The prior art for a biasing arrangement of base and body contacts for a stacked shunt switch is depicted in FIGS. 1, 2, and 3. FIG. 1 depicts the gate connections for a stacked SOI switch using floating bodies. FIG. 2 depicts the gate and body biasing connections for a stacked structure and is applicable to both SOI and bulk technologies. FIG. 3 is similar to FIG. 2 but further includes drain-source resistors.
In a front end switch design targeted at cellular applications, the number of stacked devices could easily exceed 10 and the value of the RGATE, RBODY and RDS resistors may be greater than 50 kohm. The value of the RGATE and RBODY and RDS resistors are chosen to be high enough to give an even distribution of any RF signal across each of the transistors when the switch is in its ‘off’ state but also low enough to meet switching time requirements.
The problem with this approach comes with the resistors. As the switch is split into N segments, N resistors of value N times the value used in the original resistors in the switch design are needed. This can lead to a requirement for a large number of very high value resistors resulting in significant area penalties.
Accordingly, there is a need to develop a stacked SOI switch that permits the use of smaller valued resistors.